Initial commit

trunk
alexis 7 months ago
commit d540198689
  1. 8
      .gitignore
  2. 22
      README.md
  3. 217
      atf1502-jtag-adapter/atf1502-jtag-adapter.kibot.yaml
  4. 10147
      atf1502-jtag-adapter/atf1502-jtag-adapter.kicad_pcb
  5. 436
      atf1502-jtag-adapter/atf1502-jtag-adapter.kicad_pro
  6. 2159
      atf1502-jtag-adapter/atf1502-jtag-adapter.kicad_sch
  7. 3
      atf1502-jtag-adapter/sym-lib-table
  8. BIN
      gen/atf1502-jtag-adapter-r-pcb.zip
  9. BIN
      gen/atf1502-jtag-adapter-r-stencil.zip
  10. 4345
      gen/doc/atf1502-jtag-adapter-r-ibom.html
  11. BIN
      gen/doc/atf1502-jtag-adapter-r-schem.pdf
  12. 3178
      gen/pcb-fab/atf1502-jtag-adapter-r-B_Cu.gbl
  13. 292
      gen/pcb-fab/atf1502-jtag-adapter-r-B_Mask.gbs
  14. 1070
      gen/pcb-fab/atf1502-jtag-adapter-r-B_Silkscreen.gbo
  15. 36
      gen/pcb-fab/atf1502-jtag-adapter-r-Edge_Cuts.gm1
  16. 5816
      gen/pcb-fab/atf1502-jtag-adapter-r-F_Cu.gtl
  17. 858
      gen/pcb-fab/atf1502-jtag-adapter-r-F_Mask.gts
  18. 603
      gen/pcb-fab/atf1502-jtag-adapter-r-F_Paste.gtp
  19. 2392
      gen/pcb-fab/atf1502-jtag-adapter-r-F_Silkscreen.gto
  20. 13
      gen/pcb-fab/atf1502-jtag-adapter-r-NPTH.drl
  21. 61
      gen/pcb-fab/atf1502-jtag-adapter-r-PTH.drl
  22. 12
      gen/pcba-fab/atf1502-jtag-adapter-r-bom-inventree.csv
  23. 28
      gen/pcba-fab/atf1502-jtag-adapter-r-bom.csv
  24. BIN
      gen/render/atf1502-jtag-adapter-r-2d-bot.png
  25. BIN
      gen/render/atf1502-jtag-adapter-r-2d-top.png
  26. 37
      gen/stencil-fab/atf1502-jtag-adapter-r-B_Paste.gbp
  27. 603
      gen/stencil-fab/atf1502-jtag-adapter-r-F_Paste.gtp
  28. BIN
      misc/2dbot-thumb.png
  29. BIN
      misc/2dtop-thumb.png
  30. BIN
      misc/3d-thumb.png
  31. BIN
      misc/3d-top.png

8
.gitignore vendored

@ -0,0 +1,8 @@
# Ignore list for: kicad
*.bck
*.kicad_pcb-bak
*.sch-bak
*-cache
*-backups
*.kicad_prl
3d

@ -0,0 +1,22 @@
# ATF150x JTAG adapter
This board is a plug-in adapter to program ATF150x CPLDs on a J-Link. It
supports both 5V and 3.3V variants, and provides testpoints to inject 12V to
unlock a locked device.
[![3D render](./misc/3d-thumb.png)](./misc/3d-top.png)
[![Top view](./misc/3dtop-thumb.png)](./gen/render/atf1502-jtag-adapter-r-2d-top.png)
[![Bottom view](./misc/3dbot-thumb.png)](./gen/render/atf1502-jtag-adapter-r-2d-bot.png)
- [Schematic](./gen/doc/atf1502-jtag-adapter-r-schem.pdf)
- [IBOM](./gen/doc/atf1502-jtag-adapter-r-ibom.html)
For parts, see the schematic fields. "BOM" numbers are references to my internal
stock keeping system, but you should be able to find equivalents easily.
I may have spare PCBs on hand too, just ask.
## License/copyright
Intellectual property is bullshit. This is everyone's design.

@ -0,0 +1,217 @@
# Output structure:
#
# gen/
# pcba-fab/
# PROJECT-bom.csv
# PROJECT-bom-inventree.csv
# pcb-fab/
# Gerbers
# Fab notes
# Drill files
# stencil-fab/
# Paste layers
# render/
# PROJECT-3d-top.png
# PROJECT-3d-bot.png
# PROJECT-2d-top.png
# PROJECT-2d-bot.png
# doc/
# PROJECT-schem.pdf
# PROJECT-ibom.html
#
# PROJECT-pcb.zip <-- pcb-fab
# PROJECT.stencil.zip <-- stencil-fab
# PROJECT.step
#
# Note that the 3D files (STEP and renders) are not exported by default as
# these exports are very slow. Ask for them by name:
# kibot step 3d-top 3d-bot
kibot:
version: 1
global:
solder_mask_color: green
silk_screen_color: white
pcb_finish: ENIG
units: 'millimeters'
output: '%f-r%r-%i.%x'
preflight:
run_erc: false
run_drc: false # TODO kicad issue #11410, this doesn't work
check_zone_fills: true
ignore_unconnected: false
filters:
- name: inventree_filter
type: generic
exclude_any:
- column: 'BOM'
regex: '^UNTR:'
- column: 'BOM'
regex: '^$'
- name: light_step_filter
type: generic
exclude_any:
- column: 'Footprint'
regex: '^Resistor_SMD:R_(0805|0603|0402|0201)'
- column: 'Footprint'
regex: '^Capacitor_SMD:C_(0805|0603|0402|0201)'
outputs:
- name: pcb-fab-main
type: gerber
dir: ../gen/pcb-fab
options:
&gerbopts
exclude_edge_layer: false
exclude_pads_from_silkscreen: true
plot_sheet_reference: false
plot_footprint_refs: true
plot_footprint_values: true
force_plot_invisible_refs_vals: false
tent_vias: true
line_width: 0.15
subtract_mask_from_silk: true
use_protel_extensions: true
gerber_precision: 4.5
create_gerber_job_file: false
use_gerber_x2_attributes: false
disable_aperture_macros: true
layers:
- 'F.Cu'
- 'B.Cu'
- 'F.SilkS'
- 'B.SilkS'
- 'F.Mask'
- 'B.Mask'
- 'F.Paste'
- 'Edge.Cuts'
- name: pcb-fab-drill
type: excellon
dir: ../gen/pcb-fab
options:
pth_and_npth_single_file: false
pth_id: "PTH"
npth_id: "NPTH"
metric_units: true
route_mode_for_oval_holes: false
- name: stencil-fab
type: gerber
dir: ../gen/stencil-fab
options:
<<: *gerbopts
layers:
- 'F.Paste'
- 'B.Paste'
- name: 2d-top
type: pcbdraw
dir: ../gen/render
options: &2dopts
format: png
output: '%f-r%r-2d-top.%x'
dpi: 600
- name: 2d-bot
type: pcbdraw
dir: ../gen/render
options:
<<: *2dopts
output: '%f-r%r-2d-bot.%x'
bottom: true
- name: 3d-top
type: render_3d
dir: ../gen/render
run_by_default: false
options: &3dopts
output: '%f-r%r-3d-top.%x'
solder_mask: '#1C4C2D'
zoom: 4
rotate_z: 2
rotate_x: 3
move_y: 1
height: 1000
width: 1000
- name: 3d-bot
type: render_3d
dir: ../gen/render
run_by_default: false
options:
<<: *3dopts
output: '%f-r%r-3d-bot.%x'
rotate_z: 18
rotate_x: 20
- name: bom
type: bom
dir: ../gen/pcba-fab
options:
format: CSV
output: '%f-r%r-bom.%x'
- name: bom-inventree
type: bom
dir: ../gen/pcba-fab
options:
format: CSV
columns:
- field: BOM
name: part_name
- field: "Quantity Per PCB"
name: quantity
- field: References
name: reference
- field: Note
name: note
csv:
hide_pcb_info: true
hide_stats_info: true
exclude_filter: inventree_filter
output: '%f-r%r-bom-inventree.%x'
- name: schem
type: pdf_sch_print
dir: ../gen/doc
options:
output: '%f-r%r-schem.%x'
- name: ibom
type: ibom
dir: ../gen/doc
options:
layer_view: F
show_fabrication: true
extra_fields: BOM
output: '%f-r%r-ibom.%x'
- name: step
type: step
dir: ../gen
run_by_default: false
options:
dnf_filter: light_step_filter
origin: drill
- name: pcb-archive
type: compress
dir: ../gen
options:
files:
- source: ../gen/pcb-fab/**
dest: 'pcb'
output: '%f-r%r-pcb.%x'
- name: stencil-archive
type: compress
dir: ../gen
options:
files:
- source: ../gen/stencil-fab/**
dest: 'stencil'
output: '%f-r%r-stencil.zip'

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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 0.6,
"fab_text_size_v": 0.6,
"fab_text_thickness": 0.09999999999999999,
"fab_text_upright": false,
"other_line_width": 0.15,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.4,
0.8,
1.2
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
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2
],
[
0,
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],
[
0,
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],
[
0,
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],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "atf1502-jtag-adapter.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "${ALEXISVL}/basic.kicad_wks",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"e63e39d7-6ac0-4ffd-8aa3-1841a4541b55",
""
]
],
"text_variables": {}
}

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(sym_lib_table
(lib (name "icm68k")(type "KiCad")(uri "${KIPRJMOD}/../icm68k.kicad_sym")(options "")(descr ""))
)

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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,6.0.4+dfsg-1~bpo11+1*
G04 #@! TF.CreationDate,2022-04-24T10:25:53-06:00*
G04 #@! TF.ProjectId,atf1502-jtag-adapter,61746631-3530-4322-9d6a-7461672d6164,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Soldermask,Bot*
G04 #@! TF.FilePolarity,Negative*
%FSLAX45Y45*%
G04 Gerber Fmt 4.5, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 6.0.4+dfsg-1~bpo11+1) date 2022-04-24 10:25:53*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 #@! TA.AperFunction,Profile*
%ADD10C,0.100000*%
G04 #@! TD*
%ADD11C,1.700000*%
%ADD12C,2.000000*%
G04 APERTURE END LIST*
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G01*
X15390750Y-10700500D01*
G75*
G02*
X15414500Y-10724250I0J-23750D01*
G01*
X15414500Y-10784250D01*
G75*
G02*
X15390750Y-10808000I-23750J0D01*
G01*
G37*
G36*
G01*
X15390750Y-10635500D02*
X15343250Y-10635500D01*
G75*
G02*
X15319500Y-10611750I0J23750D01*