Start voice board doc

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# Voice board rev 1 datasheet
This is a "datasheet" for voice board rev 1, explaining how to interface with
it.
## Digital interface
This board uses an addressed SPI bus. An eight-bit address is send along with
clock, data, and a select signal ("VS" = voice select). The upper four bits
of the address specify a board, and the lower bits specify a device on the
board. When the select signal asserts, if the upper address bits match, a local
chip select is generated for the device specified by the lower bits.
Board addresses are set by the installer via a DIP switch.
Device addresses are as follows:
| Address | Device name | Device type |
|--------:|-------------|-------------|
| 0 | DAC | BH2226F octal 8-bit DAC |
| 1 | CFG | 16-bit chain of 74'595 |
| 2 | MIX | MCP4351 quad digital potentiometer with disconnect switches |
| 3 | ENV | Dual envelope generator |
| 4 | OSC | MCP4351 quad digital potentiometer with disconnect switches |
## Settings
The following parameters can be set. They are specified with their nominal
"default" value to produce a demo tone, without calibration:
- Oscillator 1: symmetric triangle, A3 (220 Hz)
- Oscillator 2: symmetric triangle, E4 (329.63 Hz)
- No hard sync
- No modulations
- Mix: 100% oscillator 1, 25% oscillator 2, 0% noise
- Filter cutoff: A4 (440 Hz) via pitch tracking
| Location | Name | Scale | Setting for demo | Description |
|----------|------------------|---------------------|------------------|-------------|
| DAC.1 | SYMM1 | Fractional | 50% | Unmodulated symmetry of oscillator 1 |
| DAC.2 | SYMM2 | Fractional | 50% | Unmodulated symmetry of oscillator 2 |
| DAC.3 | VCF\_CV | 500mV/oct or 5V/oct | (tbd) | Filter cutoff control voltage (offset when tracking pitch) |
| DAC.4 | VCF\_Q | Unitless | 0% | Filter resonance |
| DAC.5 | LSB1 | 500mV/oct partial | (tbd) | Pitch 1 LSB |
| DAC.6 | MSB1 | 500mV/oct partial | (tbd) | Pitch 1 MSB |
| DAC.7 | LSB2 | 500mV/oct partial | (tbd) | Pitch 2 LSB |
| DAC.8 | MSB2 | 500mV/oct partial | (tbd) | Pitch 2 MSB |
| CFG.0 | nLFO\_AM | 0 = mod | 1 | (inv) LFO provides AM |
| CFG.1 | nSHAPE\_1 | 1 = tri, 0 = squ | 1 | Osc 1 shape |
| CFG.2 | nSHAPE\_2 | 1 = tri, 0 = squ | 1 | Osc 2 shape |
| CFG.3 | HARD\_SYNC | 1 = sync, 0 = norm | 0 | Osc 1 syncs 2 |
| CFG.8 | VCO1\_RISE\_ACC | 1 = accel, 0 = norm | 0 | Accelerate rise of osc 1 (sawtooth) |
| CFG.9 | VCO2\_RISE\_ACC | 1 = accel, 0 = norm | 0 | Accelerate rise of osc 2 (sawtooth) |
| CFG.10 | VCF\_CV\_RANGE | 1 = 500mV/oct, 0 = 5V/oct | 0 | Range of filter cutoff CV |
| CFG.11 | VCF\_TRACKS\_PITCH | 1 = track, 0 = norm | 1 | Filter tracks pitch 1 |
| CFG.12 | VCF\_LFO\_MOD1 | 1 = low, 0 = norm | 0 | Filter modulated by LFO, low range |
| CFG.13 | VCF\_LFO\_MOD2 | 1 = med, 0 = norm | 0 | Filter modulated by LFO, med range (med+low=high) |
| MIX.1 | MIXER\_OSC1 | Fractional | 100% | Amplitude of oscillator 1 in mixer |
| MIX.2 | MIXER\_OSC2 | Fractional | 25% | Amplitude of oscillator 2 in mixer |
| MIX.3 | MIXER\_NOISE | Fractional | 0%, open A | Amplitude of noise in mixer |
| MIX.4 | VCF\_ENVELOPE | Frac. * tbd/oct | 0%, open all | Amount of env 2 modulation of filter |
| ENV.x | (envelope parameters TBD ) | | | |
| OSC.1 | OSC2\_ENV\_AMT | Fractional * 2.66V/osc | 0%, open all | Amount of envelope 2 FM on oscillator 2 |
| OSC.2 | OSC\_LFO\_PWM | Complex, see below | Open all | Amount of LFO PWM on both oscillators |
| OSC.3 | OSC2\_LFO\_AMT | Fractional * 2.66V/oct | 0%, open all | Amount of LFO FM on oscillator 2 |
| OSC.4 | OSC1\_LFO\_AMT | Fractional * 2.66V/oct | 0%, open all | Amount of LFO FM on oscillator 1 |
### LFO PWM control
PWM of the LFO against both oscillators is controlled by a single potentiometer.
Each end goes to one oscillator and is fed a symmetry offset through a resistor.
To enable LFO PWM on that oscillator, close the disconnect switch at that end.
Moving the wiper controls the amount of modulation. If both ends are closed,
both oscillators are PWM'd, and as PWM is increased to one it is decreased to
the other. The recommended user interface control for this is a balance control
with two enable switches, directly translated to wiper positions (while the
mathematical relationship is complicated, it will be easy to set by ear).
Engaging PWM will change the command authority of the symmetry offset, so if
this is to remain accurate on average it will need to be recalculated.
Sorry, I didn't want to add another quad pot for one damn channel.
## Gating
Gating is controlled entirely by SPI commands to the digital envelope generator;
there is no independent gate signal. Two bussed signals routed to the envelope
generator could provide a timing synchronization signal in the future, but
this isn't likely to be needed.

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(reference "R159") (unit 1) (value "200k") (footprint "Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder")