73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
// intellectual property is bullshit bgdc
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#ifndef UTASK_RISCV_H
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#define UTASK_RISCV_H
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#ifndef IN_UTASK_H
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# error "Do not use utask_riscv.h by itself. Instead, include utask.h"
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#endif
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// To get the fastest possible context switches, this implementation uses a
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// special "micro-longjmp". Normally, setjmp/longjmp saves and restores an
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// entire context. This isn't really necessary, though. By declaring all the
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// normally callee-saved registers as clobbers, we can simply tell the compiler
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// that we WON'T save anything, and it's forced to arrange for these values
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// to be saved. Because it probably does not have the full complement of saved
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// registers in flight at this moment, it is going to emit significantly less
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// memory shuffling than we would have to with no knowledge of its register
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// allocations.
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//
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// We're also floating point safe without needing to reserve space for all
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// those floating-point registers even when they're unused.
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struct utask_arch_specific
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{
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uintptr_t pc;
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uintptr_t sp;
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};
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extern struct utask_arch_specific utask_ujb;
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#define UTASK_ARCH_SPECIFIC_DEFS \
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struct utask_arch_specific __attribute__((used)) utask_ujb;
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void utask_riscv_start(uintptr_t arg, void * task, void * tas);
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void utask_riscv_continue(void * tas);
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void utask_riscv_yield(void * tas);
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#define utask_start(task) do { \
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(task)->_arch.sp = (uintptr_t) (task)->stack_top; \
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__sync_synchronize(); \
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utask_riscv_start((task)->_arg, (task), &(task)->_arch); \
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asm volatile("" ::: "memory", "cc", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"s8", "s9", "s10", "s11", \
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"fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", \
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"fs8", "fs9", "fs10", "fs11" \
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); \
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} while (0)
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#define utask_continue(task) do { \
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__sync_synchronize(); \
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utask_riscv_continue(&(task)->_arch); \
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asm volatile("" ::: "memory", "cc", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"s8", "s9", "s10", "s11", \
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"fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", \
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"fs8", "fs9", "fs10", "fs11" \
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); \
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} while (0)
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#define utask_yield() do { \
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__sync_synchronize(); \
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utask_riscv_yield(¤t_task->_arch); \
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asm volatile("" ::: "memory", "cc", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"s8", "s9", "s10", "s11", \
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"fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", \
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"fs8", "fs9", "fs10", "fs11" \
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); \
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} while (0)
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#endif // !defined(UTASK_RISCV_H)
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