Talk less shit

doc/TOO.md

@@ -1,18 +1,22 @@
 # TIMDAC Theory of Operation
 
 TIMDAC is _not_ a PWM DAC, where a waveform is generated whose average value
-equals the desired output, and then filtered all the way down to DC. To get
-precision-DAC levels of resolution from this, a PWM DAC must be filtered so
-steeply that its settling time becomes enormous (around 5ms for 1 LSB ripple
-at 15 bits, 50ms for 0.1LSB ripple, and so on), and this settling time also
-significantly limits the ability to scan a large number of channels.
+equals the desired output, and then filtered all the way down to DC. While this
+is definitely a feasible way to implement a precision DAC, the level of
+filtering required to achieve usable 15-bit or 16-bit performance severely
+limits the update rate, especially if using a scanning sequence to generate
+more outputs than available PWM channels. Also, to truly achieve equivalent
+specs to TIMDAC, other circuits implemented here (such as the constant-impedance
+reference chopper) become necessary. While you could use a PWM DAC and get most
+of the way there, TIMDAC takes it that little smidge farther into commercial-
+equivalent DAC performance.
 
-Instead, TIMDAC uses an integrating sample-and-hold topology. A single pulse
-is integrated, producing a ramp from 0 up to the product of the pulse width
-and the reference slope. At the end of the pulse, the final value is sampled
-and held in an output capacitor. TIMDAC can update in as little as 1.3ms, with
-an "ideally zero" ripple limited only by analog switch performance and layout
-quality.
+Instead of PWM, TIMDAC uses an integrating sample-and-hold topology. A single
+pulse is integrated, producing a ramp from 0 up to the product of the pulse
+width and the reference slope. At the end of the pulse, the final value is
+sampled and held in an output capacitor. TIMDAC can update in as little as
+1.3ms, with an "ideally zero" ripple limited only by analog switch performance
+and layout quality.
 
 ## Hardware